README for BAT omu Benchmarks
-----------------------------

The file contains information about the Out-of-Order Memory Update
(omu) BAT benchmarks used for experiments in the following paper.

[1] Panagiotis Manolios, Sudarshan K. Srinivasan, and Daron
Vroon. Automatic Memory Reductions for RTL-Level Verification. ICCAD
2006, ACM-IEEE International Conference on Computer Aided Design,
November 2006.


The out-of-order memory update (omu) benchmark models out-of-order
retirement of instructions--a feature that can be found in many
commercial microprocessors--as a sequence of out-of-order updates to a
memory. In the omu benchmark, an initial memory mem with 65536 words
is modified by a sequence of writes, where each write in the sequence
writes to a different memory location, resulting in memory mem1. This
sequence of writes is again used to modify memory mem, but, in a
different order resulting in memory mem2.  The property checked is
that a read from mem1 at one of the locations updated by the write
sequence is equal to a read from the same location at mem2.


Bug-Report
----------
If you find any problems you can report to
darshan@ece.gatech.edu or vroon@cc.gatech.edu.


AUTHORS
-------
Panagiotis Manolios
Sudarshan Srinivasan
Daron Vroon
